a) What is the total number of virtual pages and page frames in this system?
It's impossible to guess the total number of virtual pages (in one virtual address space) from the information given. Note that "16-bit" typically refers to general purpose register size and virtual address size can be different (e.g. maybe pairs of 16-bit registers are used to form 32-bit virtual addresses, and maybe the highest 4 bits of the pair are unused, so maybe the virtual addresses are 28 bits).
If there's 6 KiB of RAM and each page is 2 KiB, then there's only three physical pages. One of the pages will need to be used to contain the page table, which only leaves 2 physical pages that can be used for code and data. The page fault handler's code can not be sent to swap space (how would the page fault handler get itself back from swap space?) and it will consume at least one page of RAM; so that only leaves one physical page that can be used by "normal" software.
At a minimum, if an instruction accesses memory the page containing the instruction and the page containing the data it accesses must both be in memory at the same time, but you've only got one physical page left that can be used and therefore it's extremely unlikely that you can have both the instruction and the data it needs in memory at the same time.
Essentially, the computer is too limited to allow paging to viable.
b) How many page faults are issued when using the FIFO and algorithm for the accesses above?
In practice; the number of page faults will be zero, because any sane person would've thrown the computer in the trash before writing any software.
In theory; assuming that "page fault" is only triggered by needing to fetch data from swap space (and is not caused by any kind of protection violation, and isn't caused by "TLB miss"); then with only one physical page left (and assuming that the instructions that access memory are in the same page as the data they access to get past the "un-credible" stupidity of the question) every access will be a page fault except for one (at the "4, 4" part where the same page is used twice in a row). Of course if you ignore everything that matters in reality (e.g. pretend that there is no page table in RAM and pretend that there is no code making the accesses and the accesses just appear out of thin air by magic) then the theoretical answer may be different.
Note that (if my educated guesses are right and your "FIFO" is the algorithm used to figure out what is evicted from RAM and sent to swap space) you should be annoyed. Nobody has ever used FIFO for this and nobody ever will (because "first in" may be a very frequently used page that is always needed that should never be sent to swap space - e.g. maybe it's a page that contains all of the code that's making "data accesses"). Ideally you want to evict the least likely to be needed page (which can't be known because it involves predicting the future) and almost everything uses "least recently used page is evicted" as a practical substitute.
c) Describe the memory mapping of the pages at moment 10 in the scenario above
d) Considering that at moment 11 you are accessing the virtual address 0xB0BB, what is its corresponding page frame?
With only one physical page that can be used for normal accesses; there's a 33.33% chance that every normal access uses the physical page starting at physical address 0x0000, a 33.33% chance it's the page starting at physical address 0x0800, and a 33.33% chance that it's starting at physical address 0x1000. There is no way to determine (from the information given) which physical page will be used as the only page that can be used for normal accesses.
Now...
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